关键词: 相变存储器, 混合主存, 写感知, 主存管理

Abstract: Phase change memory (PCM) has been increasingly viewed as an attractive technology to incorporate into the memory hierarchy since the scalability of DRAM (dynamic random access memory) is approaching its limit. Although PCM has higher density and lower idle power consumption than DRAM while exhibiting byte-addressability and read latencies in the nanosecond range, it has poor write performance and limited endurance. Therefore, researchers have proposed hybrid memory systems involving both PCM and DRAM. This paper presents CLOCKW (CLOCK with a write-aware strategy), a novel hybrid memory management scheme that is designed to not only minimize writes to PCM, but also maintain a high hit ratio. The purpose of CLOCKW is trying to make write-intensive pages resident in DRAM. Particularly, differing from previous studies, which use RW (recency of writes) to estimate future access patterns, this paper introduces the concept of IWD (inter-write-distance), and combines it with RW to estimate hotness of future writes. In addition, by additionally keeping a record of a limited number of replaced pages’ write references and placing the newly reached page in an appropriate storage medium when page fault occurs, unnecessary migrations between DRAM and PCM can be avoided. More importantly, CLOCKW is based on the CLOCK scheme, and its running cost is affordable for virtual memory management. The evaluation shows that CLOCKW can efficiently reduce PCM writes without degrading the hit ratio.

Key words: phase change memory, hybrid memory, write-aware, buffer management