关键词: 多核结构, 硬实时任务, bank冲突, bank-column划分, bank到核映射

Abstract:  The inter-task interferences on the shared resources of embedded multicore are the difficulty for the WCET (worst-case execution time) estimation of hard real-time tasks. Moreover, the decrease of the delay caused by the interferences on the shared resources can reduce the estimated WCET and improve the schedulability of hard real-time tasks. This paper proposes an optimization method to reduce the upper bound of inter-task interference    delay in the multicore with interference-aware bus arbiter (IABA). According to the relationship between the upper bound of inter-task interference delay and the count of bank conflict, this paper optimizes bank to core mapping to reduce the count of bank conflict, and then reduces the upper bound of inter-task interference delay and the estimated WCET. Compared with existing methods, the proposed method can reduce about 29% of the estimated WCET.

Key words: multicore, hard real-time task, bank conflict, bank-column partitioning, bank to core mapping