Journal of Frontiers of Computer Science and Technology ›› 2015, Vol. 9 ›› Issue (2): 129-164.DOI: 10.3778/j.issn.1673-9418.1411030

Previous Articles     Next Articles

Survey on Topologies of Three-Dimensional Network on Chip

ZHANG Dakun1+, SONG Guozhi1, WANG Lianlian2, HUANG Cui1   

  1. 1. School of Computer Science and Software Engineering, Tianjin Polytechnic University, Tianjin 300387, China
    2. Network Center, Tianjin Agricultural University, Tianjin 300384, China
  • Online:2015-02-01 Published:2015-02-03

三维片上网络拓扑结构研究综述

张大坤1+,宋国治1,王莲莲2,黄  翠1   

  1. 1. 天津工业大学 计算机科学与软件学院,天津 300387
    2. 天津农学院 网络中心,天津 300384

Abstract: Three-dimensional network on chip (3D NoC) is developed based on three-dimensional integrated circuit (3D IC), system on chip (SoC) and two-dimensional network on chip (2D NoC). 3D NoC is mainly used to solve the problems such as communication bottleneck of highly integrated chips. It has attracted great attention from both academia and industry at home and abroad. 3D NoC topology structure reflects the layout and connectivity of communications node in the chip, which is crucial for the performance of 3D chip. This paper introduces 2D NoC, the evolution from 2D NoC to 3D NoC, the advantages and problems of adopting 3D NoC and the key technical issues which can be solved by 3D NoC, and analyzes the overall development of 3D NoC. 3D topology is one of the key problems in the design of 3D NoC. This paper mainly studies the different classification methods for 3D NoC topology and divides 3D NoC topologies into 9 categories in terms of communication, then gives a thorough study of 3D NoC topology structures with comparison and analysis of the characteristics for each topology structure. Finally, this paper indicates the possible future research development of 3D NoC topology.

Key words: three-dimensional network on chip (3D NoC), communication bottleneck, topology, classification of topology

摘要: 三维片上网络(three-dimensional network on chip,3D NoC)是在三维集成电路(three-dimensional integrated circuit,3D IC)、片上系统(system on chip,SoC)和二维片上网络(two-dimensional network on chip,2D NoC)的基础上发展起来的,主要解决高集成度芯片通信瓶颈等问题,已引起国内外学术界和产业界的高度重视。3D NoC拓扑结构体现了通信节点在芯片中的布局与连接,对三维芯片性能起决定性作用。简介了2D NoC、2D NoC到3D NoC的演变、3D NoC的优点与存在的问题以及3D NoC解决的关键技术问题,分析了3D NoC总体发展状况。三维拓扑结构是3D NoC设计中的关键问题之一,重点研究了3D NoC拓扑结构的分类方法,从通信角度将3D NoC拓扑结构分成9大类,分类论述了3D NoC拓扑结构,并分析比较了现有63种拓扑结构各自的特点,最后指出了3D NoC拓扑结构的未来研究方向。

关键词: 三维片上网络(3D NoC), 通信瓶颈, 拓扑结构, 拓扑结构分类